hardware description language hdl coder  (MathWorks Inc)

Journal: Frontiers in Energy Research

Article Title: Enhancing power quality monitoring with discrete wavelet transform and extreme learning machine: a dual-stage pattern recognition approach

doi: 10.3389/fenrg.2024.1435704

Figure Lengend Snippet: FIGURE 8 (A) MATLAB Model for standard voltage; (B) Waveform for standard voltage.

Article Snippet: For the simulation environment, the FPGA model was validated using the following environment: • Software: • MATLAB R2021b • MATLAB HDL Coder • Xilinx Vivado 2020.2 • Hardware: • Xilinx Zynq-7000 SoC FPGA • Clock frequency: 100 MHz • FPGA resources: 53,200 LUTs, 106,400 FlipFlops, 140 BRAMs Concerning the dataset used, the dataset for training and testing the Extreme Learning Machine (ELM) classifier was generated using simulated power quality disturbances.

Techniques:

Journal: Frontiers in Energy Research

Article Title: Enhancing power quality monitoring with discrete wavelet transform and extreme learning machine: a dual-stage pattern recognition approach

doi: 10.3389/fenrg.2024.1435704

Figure Lengend Snippet: FIGURE 10 (A) MATLAB Model for voltage sag and voltage surge; (B) Waveform for voltage sag and voltage surge.

Article Snippet: For the simulation environment, the FPGA model was validated using the following environment: • Software: • MATLAB R2021b • MATLAB HDL Coder • Xilinx Vivado 2020.2 • Hardware: • Xilinx Zynq-7000 SoC FPGA • Clock frequency: 100 MHz • FPGA resources: 53,200 LUTs, 106,400 FlipFlops, 140 BRAMs Concerning the dataset used, the dataset for training and testing the Extreme Learning Machine (ELM) classifier was generated using simulated power quality disturbances.

Techniques:

Journal: Frontiers in Energy Research

Article Title: Enhancing power quality monitoring with discrete wavelet transform and extreme learning machine: a dual-stage pattern recognition approach

doi: 10.3389/fenrg.2024.1435704

Figure Lengend Snippet: FIGURE 11 (A) MATLAB Model for transitional oscillations; (B) Waveform for transitional oscillations.

Article Snippet: For the simulation environment, the FPGA model was validated using the following environment: • Software: • MATLAB R2021b • MATLAB HDL Coder • Xilinx Vivado 2020.2 • Hardware: • Xilinx Zynq-7000 SoC FPGA • Clock frequency: 100 MHz • FPGA resources: 53,200 LUTs, 106,400 FlipFlops, 140 BRAMs Concerning the dataset used, the dataset for training and testing the Extreme Learning Machine (ELM) classifier was generated using simulated power quality disturbances.

Techniques: